Task #2928
open
Testing of PLCIO Stacked boards with CTB platform
Added by Thomas Joseph 4 months ago. Updated about 2 months ago.
Description
Assembled PLCIO boards available
Updated by Thomas Joseph 4 months ago
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#1
- Assignee changed from Thomas Joseph to Sumanth D
Updated by Thomas Joseph 4 months ago
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#2
- Subtask #2929 added
Updated by Thomas Joseph 4 months ago
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#3
- Subtask #2930 added
Updated by Thomas Joseph 4 months ago
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#4
- Parent task set to #3004
Updated by Thomas Joseph 4 months ago
· Edited
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#6
- Subject changed from Testing of PLCIO Stacked boards with eVidya platform to Testing of PLCIO Stacked boards with CTB platform
Reqirement - 16DI, 8AI, 8DO
Hardware plan (no rework)
-PLCIO#1 - 8DI, 8 DO, 8AI, 4AO(NU)
-PLCIO#2 - 8DI, 8 DO, 8AI, 4AO(NU)
eVidya- source code is for D3 board. Since D3 board is not available, need to migrate software to D4
Sunpower CTB is based on SAMD3
Hydrofab CTB is based on SAMD4
Hydrofab Hardware is (SAMD4 + D3PLCIOIF ( reworked for SPI mapping ) + 1xPLCIO)
Hardware available now : (SAMD4 + D4PLCIOIF ( no rework ) + PLCIO) => use for testing
ToDo:
- Use the Hydrofab CTB codebase and test each PLCIO board individually
- 8AI, 8DI, 8DO (DI daisy-chaining resistors), each PLCIO board individually
- Update CTB code to accommodate 16DI only for terminal printing
- 8AI, 8DI(+8DI), 8DO (DI daisy-chaining resistors), stack PLCIO boards
- @Prakash M : Share the original and revised CTB code in ondrive and share the link. File name with proper version no. sample file name is "mDAQ2-3_CTB_Datalogger_V3.4.zip"
Updated by Sunder Venugopal 4 months ago
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#7
- Status changed from Analysis Started to In Progress
Updated by Sumanth D 4 months ago
· Edited
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#8
- First testing PLCIO1. It is version 0 means PLCIOV1P0.
- For AI, Level translator got damaged. Changed the IC then for AI is printing on the terminal and ADC testing is completed. Inputs were given and the current value is printed on the log file.
- Now DI and DO were testing. Facing issues with the Board. Preset CS is not generating at the MUX IC output. Debugging that.
Updated by Thomas Joseph 4 months ago
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#9
Refer previous rework sheets to identify issue
Hydrofab CTB Rework => https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQCo-F7-UGASQalgs9YsWquxAUjJOZrl5sxI7BGTq5LQQzE?e=I3y3bv
Sunpower CTB Rework => https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQD6qJjMSTGiS6WpoLSt3LJ1AQh0N5HCnumkWKPAJP2XEzI?e=4vSxCS
PLCIOV1P1 Rework => https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQDG8q6hZY5_RJarv_nvDmPbAV_YYp9DgZXm_s--LvNbn0o?e=fzGEUP
PLCIOV1P0 Rework => https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQBpSHvnAdz8QKC2rfWexoRaAbysEmodY52owO277l3KYYM?e=BlCyqr
Updated by Thomas Joseph 4 months ago
· Edited
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#10
- Assignee changed from Sumanth D to Resmi K.V
Assigned to Resmi
@Resmi K.V :
For V1P0 bringup
Check http://5.161.106.25:3000/issues/2928#note-9 , identify existing rework , update V1P0 PCB and then continue testing
Updated by Thomas Joseph 4 months ago
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#11
@Resmi K.V : Since a new V1P1 board ( Sl. No. ???) is available, continue test with the same and make it as #2
Discard V1P0 bringup (Sl. No. ?)
Updated by Resmi K.V 4 months ago
· Edited
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#13
PLC#01 board testing has been completed for 8 AI (4 Current 4 Voltage), 8DI and 8DO and the daisy chaining changed after testing to stack the PLC#01 with PLC#02.
After stacking the stacked board has been tested for 16 DI separately and the input is given randomly, those channels were printing as 1 on the terminal. For the integrated testing of 16DI,16DO and 8AI,binary to be created by Yoganand. Once it is completed, will continue the testing and update the test result in onedrive.
Updated by Resmi K.V 4 months ago
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#14
Today I tested,
1.DI-16 Channels(PLC#01 and PLC#02 stacked)-all the channels are updating properly.
2.DO-16 Channels-all the outputs are getting as per the written data verified with DSO.
3.AI-4 current Channels -remaining 4 voltage channels i/p is given and till the ADC the voltage is verified. In the code it is taken as Current values.
Updated documents i have uploaded in onedrive
Test Results: https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQCYtUrmY8WMSY2NjCEWMIPmAZImOxNDj5EYpwers3vcvVg?e=3BgOVp
Test set up and faced issues: https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQAVs6owHiytTZU9conn0pYvAd2Zf696LdEM6bAqToX5knA?e=EFnXFq
Updated by Thomas Joseph 4 months ago
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#15
3.AI-4 current Channels -remaining 4 voltage channels i/p is given and till the ADC the voltage is verified. In the code it is taken as Current values.
Use https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQArNsENqrz_R478F5NvjOsfAQblE5bIGBFZf97QxAN-guQ?e=4yQzqr to convert ADC value into voltage and verify
Updated by Resmi K.V 4 months ago
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#16
Testing completed for both PLC#01 and PLC#02 boards. the AI Current and voltage count has been extracted from the logs and calculated the voltages as per the count. but it has nearly 0.5V variation from the applied input voltage to the observed.
The TR updated for AI current and Voltage and uploaded in onedrive.
https://elpisit-my.sharepoint.com/:x:/g/personal/satish_sl_elpisitsolutions_com/IQCMe4jJZIWEQK7jut19blzmAVxNlybU1bbk1tsN53WcRxQ?e=6hePdA
Updated by Resmi K.V 4 months ago
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#17
TA Sheet for PLCIO is uploaded in one drive
https://elpisit-my.sharepoint.com/:b:/g/personal/satish_sl_elpisitsolutions_com/IQBbGMN6CSJVRJCJna1s1yzLAXpf3-8xMvzX45kqf8M8Lh4?e=nU5zbx
Updated by Sunder Venugopal about 2 months ago
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#19
- Parent task deleted (
#3004)