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Task #3248

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TJ BM

Task #3046: Detailed Design

Task #3155: Design and Development of Interface PCB

PCB Design

Task #3248: PCB Design

Added by Thomas Joseph 29 days ago. Updated 19 days ago.

Status:
In Progress
Priority:
Normal
Assignee:
Bhavani M
Start date:
02/02/2026
Due date:
14/02/2026 (25 days late)
% Done:

90%

Estimated time:
Spent time:
13:00 h

TJ Updated by Thomas Joseph 29 days ago Actions
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 #1

  • % Done changed from 0 to 50

TJ Updated by Thomas Joseph 27 days ago · Edited Actions
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 #2

PCB Design Guidelines (2 Layer)

-Place Isolator and DC-DC converter with a clear creepage >5.00mm
-Place other components close to Isolators . Leave space at connector
-Review
-Start routing

RK Updated by Resmi K.V 26 days ago Actions
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 #3

  • Assignee changed from Resmi K.V to Bhavani M

Changing the assignee to Bhavani as she is working on it.

BM Updated by Bhavani M 25 days ago Actions
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 #5

  • % Done changed from 80 to 90

BM Updated by Bhavani M 19 days ago · Edited Actions
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 #6

https://elpisit-my.sharepoint.com/:u:/g/personal/satish_sl_elpisitsolutions_com/IQAHfVjCXq8mR6iy3YEdboKhAZeI6rS_bXzm4kFqnyr663M?e=GQqlhL.....

rename txt File created, Ref des updated in PCB layout.

GW_V2_2_CON_20260216.brd----Sorted Ref des brd.
GW_V2_2_CON_20260214.brd-- ref des matching with DSN file.
Back annotation is not happening.

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